In semiconductor fabrication, alignment of the various layers in a chip substrate is crucial. Accordingly, wafers and die commonly are formed with a number of specialty constructed alignment targets (also known as overlay targets). Specific portions of the surface are dedicated to the formation of overlay targets. These dedicated portions of the surface are scattered about the surface of the wafer to provide as much information as possible. Unfortunately, these targets take up valuable space that could otherwise have been used to form active circuit elements and structures.